From 44ae1e89161cb71eec42a0a2586fe674a09eee77 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Peter=20Babi=C4=8D?= <babicpet@gmail.com>
Date: Mon, 21 Sep 2015 01:16:11 +0200
Subject: [PATCH] GL-inet router board images replaced with the custom ones,
 without the blueprint

---
 figures/gl-inet_pcb_down.jpg |  4 ++--
 figures/gl-inet_pcb_up.jpg   |  4 ++--
 problemexpres.tex            | 24 ++++++++++++------------
 tukethesis.pdf               |  4 ++--
 4 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/figures/gl-inet_pcb_down.jpg b/figures/gl-inet_pcb_down.jpg
index 9bd1297..6d604bb 100644
--- a/figures/gl-inet_pcb_down.jpg
+++ b/figures/gl-inet_pcb_down.jpg
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:f77ab53ca50ba43c9c13adf2445befb558ac86a0b35ccdf407493d9800131a76
-size 364887
+oid sha256:f47ad220cb440de6125fcc9a66d71773550f005209f02dd2cdb9194892af0bc1
+size 676765
diff --git a/figures/gl-inet_pcb_up.jpg b/figures/gl-inet_pcb_up.jpg
index 3413676..2e8d108 100644
--- a/figures/gl-inet_pcb_up.jpg
+++ b/figures/gl-inet_pcb_up.jpg
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:8bf51168cd8f33af770f2d66104f6ba23e52c747373842d5f25bffa4349600ab
-size 314192
+oid sha256:46881045074893f48adf35af89fd17cc22197948bff8815fc270dcf21d33d68e
+size 512886
diff --git a/problemexpres.tex b/problemexpres.tex
index e26965c..8a7a74d 100644
--- a/problemexpres.tex
+++ b/problemexpres.tex
@@ -145,18 +145,18 @@ TP-Link TL-WR703N \gls{router} is a popular choice among \gls{hw} customisation
 
 Whole printed circuit board of TL-WR703N was remade by the GL.inet team to expose the unused \gls{gpio} pins on the \gls{soc}, utilize two \Gls{ethernet} port instead of one and utilize the \gls{usb} 2.0 port. Memory chips were replaced by their higher capacity alternatives.
 
-\begin{figure}[ht!]
-\centering
-\includegraphics[width=.8\textwidth,angle=0]{gl-inet_pcb_up}
-\caption{The front side of the GL.inet board exposing the main Atheros \gls{soc}, \gls{ram} and \glspl{interface}}\label{f:board_front}
-\end{figure}
-
-
-\begin{figure}[ht!]
-\centering
-\includegraphics[width=.8\textwidth,angle=0]{gl-inet_pcb_down}
-\caption{The back side of the GL.inet board exposing the \Gls{flash} memory and a main voltage regulator}\label{f:board_back}
-\end{figure}
+%\begin{figure}[ht!]
+%\centering
+%\includegraphics[width=.8\textwidth,angle=0]{gl-inet_pcb_up}
+%\caption{The front side of the GL.inet board exposing the main Atheros \gls{soc}, \gls{ram} and \glspl{interface}}\label{f:board_front}
+%\end{figure}
+%
+%
+%\begin{figure}[ht!]
+%\centering
+%\includegraphics[width=.8\textwidth,angle=0]{gl-inet_pcb_down}
+%\caption{The back side of the GL.inet board exposing the \Gls{flash} memory and a main voltage regulator}\label{f:board_back}
+%\end{figure}
 
 
 
diff --git a/tukethesis.pdf b/tukethesis.pdf
index d179e91..ca22c27 100644
--- a/tukethesis.pdf
+++ b/tukethesis.pdf
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:fe85570def9a9c75e2e2f626d34acb385f2ffc55b87d42821a8c3b0b9ab652fd
-size 2035522
+oid sha256:ebebbeefaae87baa5b7fc518c429592b6dc98eb5309649b775f443f0cafd01df
+size 1353724