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73 lines
3.9 KiB
73 lines
3.9 KiB
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\section{GL.inet board description}
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GL.inet Smart Router is a remake of a common TP-Link router TL-WR703N. The board changes include, but are not limited to, increased RAM and Flash memory, custom firmware and what is the most important - 5 usable GPIO pins exposed to the 2cm pin header for utility. Whole thesis is revolving around taking advantage of this fact. Basic information about the router are shown in Table \ref{t:charact}.
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\begin{table}[h]
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\caption{The basic characteristics of the GL.inet board}\label{t:charact}
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\medskip
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\centering
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\def\arraystretch{1.5}
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\setlength{\tabcolsep}{12pt}
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\begin{tabular}{|l|l|}
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\hline
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Model & GL-iNet 6408A / 6416A \\ \hline
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CPU & Atheros 9331, 400MHZ \\ \hline
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RAM/ROM & DDR 64MB \\ \hline
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ROM & Flash 8MB (6408A) / 16M (6416A) \\ \hline
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Interface & 1 WAN, 1 LAN, 1 USB2.0, 1 Micro USB(Power), 5 GPIO \\
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\hline
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Wireless & IEEE802.11n/g/b, IEEE802.3, IEEE802.3u \\ \hline
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\end{tabular}
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\end{table}
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\subsection{Atheros 9331 Wi-fi System-on-Chip}
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The Atheros AR9331 is a highly integrated and cost effective IEEE 802.11n 1x1 2.4 GHz Systemon-a-Chip (SoC) for wireless local area network (WLAN) AP and router platforms. The block diagram of the chip can be seen on Figure \ref{f:ar_block}. The main processor frequency is 400 MHz and it is suited for running Linux distributions for embedded devices, preferably OpenWrt or DD-Wrt.
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Features of this SoC are following:
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\begin{itemize}
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\item Complete IEEE 802.11n 1x1 AP or router in a single chip
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\item MIPS 24K processor operating at up to 400 MHz
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\item External 16-bit DDR1, DDR2, or SDRAM memory interface
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\item SPI NOR Flash memory support
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\item No external EEPROM needed
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\item 4 LAN ports and 1 WAN port IEEE 802.3 Fast Ethernet switch with auto-crossover, auto polarity, and auto-negotiation in PHYs
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\item Fully integrated RF front-end including PA and LNA
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\item Optional external LNA/PA
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\item Switched antenna diversity
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\item High-speed UART for console support
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\item I\textsuperscript{2}S/SPDIF-out audio interface
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\item SLIC for VOIP/PCM
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\item USB 2.0 host/device mode support
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\item GPIO/LED support
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\item JTAG-based processor debugging supported
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\item 25 MHz or 40 MHz reference clock input
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\item Advanced power management with dynamic clock switching for ultra-low power modes
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\item 148-pin, 12 mm x 12 mm dual-row LPCC package
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\end{itemize}
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\begin{figure}[ht!]
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\centering
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\includegraphics[width=.8\textwidth,angle=0]{AR9331_block.jpg}
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\caption{The block diagram of the Atheros AR9331 SoC used as a main processing unit on GL.inet board}\label{f:ar_block}
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\end{figure}
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\subsection{From TL-WR703N to GL.inet}
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TP-Link TL-WR703N router is a popular choice among hacker community because of it's cheap price tag compared to processing power and usage of a full-grown Linux distribution. People have figured out how to upgrade RAM / Flash memories or to make use of not used GPIO / UART ports for their own needs. These solutions however were mostly crude and expensive to replicate. The GL.inet team saw an opportunity to grasp this public knowledge and rolled out their own improved board clone to the marked.
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Whole printed circuit board of TL-WR703N was remade by the GL.inet team to expose the unused GPIO ports on the SoC, utilize two Ethernet port instead of one and utilize the USB 2.0 port. Memory chips were replaced by their higher capacity alternatives.
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\begin{figure}[ht!]
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\centering
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\includegraphics[width=.8\textwidth,angle=0]{gl-inet_pcb_up.jpg}
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\caption{The front side of the GL.inet board exposing the main Atheros SoC, RAM and interfaces}\label{f:board_front}
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\end{figure}
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\begin{figure}[ht!]
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\centering
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\includegraphics[width=.8\textwidth,angle=0]{gl-inet_pcb_down.jpg}
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\caption{The back side of the GL.inet board exposing the Flash memory and a main voltage regulator}\label{f:board_back}
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\end{figure} |